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MIET to organise 1-day national conference on emerging technologies in VLSI in Meerut
Our Bureau, Mumbai | Saturday, September 10, 2011, 08:00 Hrs  [IST]

Meerut Institute of Engineering & Technology (MIET) will organise a one day National Conference on Emerging Technologies in VLSI (NCETVLSI-2011) on 18th September 2011 at MIET campus sponsored by All India Council for Technical Education (AICTE) in Meerut, Uttar Pradesh.

The conference will focus on the main areas of recent tools in VLSI design, testing of VLSI circuits, NANO Electronics, low power devices, problems in high density, high frequency VLSI circuits, future aspects of VLSI technology, CNT, fault diagnosis and tolerance, VLSI signal processing, digital signal processing, data communication networks, wireless and mobile communication, MEMS.

It aims at bringing together specialists and experts from industries, research institutes, government agencies and academia to provide a platform for free and fruitful exchange of ideas and also to foresee the future trends in research and development in emerging technologies of VLSI and related areas.

The main objective is to promote high standards in technical education by way the of extending opportunities to the academicians and working professionals by providing a forum for sharing their knowledge, experiences, innovations and expertise in various fields of VLSI.

Er. Vishnu Saran, chairman, MIET, Er. Gaurav Agarwal, vice chairman, MIET, Lt. Gen. J M Garga, director general, MIET, Dr K Solanki, director, MIET, Dr Ram Chakka, director research, MIET, Prof. D K Sharma, head, ECE, MIET, Amit Ahuja, co-ordinator, ECE, MIET will be present at the event to provide information about the emerging technologies.

The eminent personalities of this field will deliver keynote address on research and development in emerging technologies of VLSI,  NANO Electronics, problems in VLSI circuits, communication networks, etc.

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